System Verification
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System Verification
The purpose of verification is to verify that the product works according to the specifications produced in the feasibility study and the design phase. According to IEEE/ANSI, it is a process of evaluating a system or component to determine whether the products of a given development phase satisfy the conditions imposed at the start of the phase.There are two ways to accomplish this activity:
• Testing the system, i.e., running the system on certain inputs and observing the behaviour of the system.
• Proving the correctness of the system: The first method cannot ensure the correctness of the system. However, if a problem is found, one can be certain that the system is not correct.
The second method is able to ensure the correctness of the system. Unfortunately it requires a formal specification of what the system is supposed to do. Such a specifications is likely to be as large and as error prone as the system itself. Thus,t eh specifications itself needs verifications.
Verification of the output of the coding phase is primarily intended for detercting errors introduced during this phase. That is, the goal of verification of the code produced is to show that the code is consistent with the design it is supposed to implement.
Finally, verification is used in order to verify other aspects of the system, e.g., performance. This aspect is particularly important in real-time systems where performance may determine whether the system is correct or not.
Verification must be an integral part of the design and the coding activities. The major tasks that are involved in verification are as follows:
• Program (or module) Testing
• Reviews of Design and Code.
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